NXP Semiconductors /LPC43xx /MCPWM /CAPCON_CLR

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Interpret as CAPCON_CLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CAP0MCI0_RE_CLR)CAP0MCI0_RE_CLR 0 (CAP0MCI0_FE_CLR)CAP0MCI0_FE_CLR 0 (CAP0MCI1_RE_CLR)CAP0MCI1_RE_CLR 0 (CAP0MCI1_FE_CLR)CAP0MCI1_FE_CLR 0 (CAP0MCI2_RE_CLR)CAP0MCI2_RE_CLR 0 (CAP0MCI2_FE_CLR)CAP0MCI2_FE_CLR 0 (CAP1MCI0_RE_CLR)CAP1MCI0_RE_CLR 0 (CAP1MCI0_FE_CLR)CAP1MCI0_FE_CLR 0 (CAP1MCI1_RE_CLR)CAP1MCI1_RE_CLR 0 (CAP1MCI1_FE_CLR)CAP1MCI1_FE_CLR 0 (CAP1MCI2_RE_CLR)CAP1MCI2_RE_CLR 0 (CAP1MCI2_FE_CLR)CAP1MCI2_FE_CLR 0 (CAP2MCI0_RE_CLR)CAP2MCI0_RE_CLR 0 (CAP2MCI0_FE_CLR)CAP2MCI0_FE_CLR 0 (CAP2MCI1_RE_CLR)CAP2MCI1_RE_CLR 0 (CAP2MCI1_FE_CLR)CAP2MCI1_FE_CLR 0 (CAP2MCI2_RE_CLR)CAP2MCI2_RE_CLR 0 (CAP2MCI2_FE_CLR)CAP2MCI2_FE_CLR 0 (RT0_CLR)RT0_CLR 0 (RT1_CLR)RT1_CLR 0 (RT2_CLR)RT2_CLR 0RESERVED

Description

Event Control clear address

Fields

CAP0MCI0_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP0MCI0_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP0MCI1_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP0MCI1_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP0MCI2_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP0MCI2_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP1MCI0_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP1MCI0_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP1MCI1_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP1MCI1_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP1MCI2_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP1MCI2_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP2MCI0_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP2MCI0_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP2MCI1_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP2MCI1_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP2MCI2_RE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

CAP2MCI2_FE_CLR

Writing a one clears the corresponding bits in the CAPCON register.

RT0_CLR

Writing a one clears the corresponding bits in the CAPCON register.

RT1_CLR

Writing a one clears the corresponding bits in the CAPCON register.

RT2_CLR

Writing a one clears the corresponding bits in the CAPCON register.

RESERVED

Reserved.

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